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SOI Wafers
Home » SOI Wafers ยป Product Line
     
 
The applications of SOI wafers can be typically divided based on the thickness of the device layer:
 
b “Thick” SOI wafers with silicon layers thicker than one micron, are typically used for a wide variety of applications in power switching
  devices, high-speed bipolar circuits, and MEMS devices. Currently most of the thick SOI wafer are manufactured by bonding two wafers (typically one with oxide (BOX) following by grinding and polishing process of the device layer. This process offers wide range of thickness for each segment of the SOI structure (device layer, buried oxide layer or handle wafer)
   
b “Thin” SOI wafers with silicon layers in the range of 20 to 300nm are typically used for CMOS ICs applications. This type of SOI wafers are
  manufactured mainly using SmartCutTM (UNIBOND) and SIMOXTM (Separation by IMplanted OXygen) technology.
 
SQI offers the following specifications of the SOI wafers manufactured using different techniques depending on the thickness requirements for device layer of handle wafer:
 
Diameter
b 2”, 3”, 100mm, 125mm, 150mm, and 200mm
 
Device Layer
b Thickness: 0.1 μm to 150 μm
b Dopant
b N type – Phosphorous, Arsenic, and Antimony
b P Type – Boron
b Resistivity: 0.001 to 10,000 Ωcm
b Orientation: <1-0-0>, <1-1-1> and <1-1-0>, Other on request
 
Buried Oxide (BOX) Layer
b Thickness: 0.1 μm 10 μm
 
Handle Wafer
b Thickness: from 150 μm and up
b Dopant
b N type – Phosphorous, Arsenic, and Antimony
b P Type – Boron
b Resistivity: 0.001 to 10,000 Ωcm
b Orientation: <1-0-0>, <1-1-1> and <1-1-0>, Other on request
 
 
 
       
 
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