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| Application Notes |
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Home » Application Notes |
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| Edge Treatment Process of Bonded Wafers |
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| Floating section of silicon |
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Possible cracks |
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Chips |
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Floating section of silicon |
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| Floating section removed |
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No crack |
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Chips |
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No floating section of silicon |
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Non ground & polished wafer |
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Ground & polished wafer |
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Possible cracks |
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No chip |
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No floating section of silicon |
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| These pictures refer to wafers that have been bonded together and then ground and polished. Under normal circumstances, due to weak bonding at the edge of the pair, the top silicon wafer will partially flake off, especially if it is thinned to less than 100 μm in thickness. This is shown in Figure A. SQI’s process for edge treatment, which is called PETP, removes all weakly bonded segments of the top silicon wafer. PETP leaves behind a rough edge on the top layer, but it prevents the layer from flaking off during shipment subsequent processing. In addition, SQI is developing a new process that will leave behind a well-defined edge and a precisely controlled diameter. The wafer will look like Figure C. |
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| “A” Level Wafer – unacceptable after polishing |
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“B” Level Wafer – acceptable after SQI PETP |
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